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Vic 20 Memory Expansion

Available on Commodore Vic 20 computers. On the left side.

  1               TOP              22
+-------------------//----------------+
| =================//================ |
+-----------------//------------------+
  A              BOTTOM             Z

UNKNOWN (at the Computer)

UNKNOWN CONNECTOR at the Computer.


Pin Name Description
A GND Ground
B CA0 Address 0
C CA1 Address 1
D CA2 Address 2
E CA3 Address 3
F CA4 Address 4
H CA5 Address 5
J CA6 Address 6
K CA7 Address 7
L CA8 Address 8
M CA9 Address 9
N CA10 Address 10
P CA11 Address 11
R CA12 Address 12
S CA13 Address 13
T I/O 2 Decoded I/O block 2, starting at $9130
U I/O 3 Decoded I/O block 3, starting at $9140
V S02 Phase 2 System Clock
W /NMI Non maskable Interrupt
X /RESET 6502 Reset
Y n/c Not connected
Z GND Ground
1 GND Ground
2 CD0 Data 0
3 CD1 Data 1
4 CD2 Data 2
5 CD3 Data 3
6 CD4 Data 4
7 CD5 Data 5
8 CD6 Data 6
9 CD7 Data 7
10 /BLK 1 BLK 1 (Memory location $2000 - $3fff)
11 /BLK 2 BLK 2 (Memory location $4000 - $5fff)
12 /BLK 3 BLK 3 (Memory location $6000 - $7fff)
13 /BLK 5 BLK 5 (Memory location $a000 - $bfff)
14 RAM 1 RAM 1 (Memory location $0400 - $07ff)
15 RAM 2 RAM 2 (Memory location $0800 - $0bff)
16 RAM 3 RAM 3 (Memory location $0c00 - $0fff)
17 V R/W Read/Write from Vic chip (1=R, 0=W)
18 C R/W Read/Write from CPU (1=R, 0=W)
19 /IRQ 6502 Interrupt Request
20 n/c Not connected
21 +5V +5 VDC
22 GND Ground
 
Spectravideo SVI318/328 Expansion Bus

UNKNOWN (at the computer)

50 PIN MALE EDGE the computer.

Pin Name Dir Description
1 +5v --> Power, 300mA
2 /CNTRL2 <-- Game adapter control signal
3 +12v --> Power, 100mA
4 -12v --> Power, 50mA
5 /CNTRL1 <-- Game adapter control signal
6 /WAIT <-- Z80 WAIT
7 /RST <-- Z80 RST
8 CPU CLK --> Buffered 3.58MHz system clock
9 A15 --> Buffered Address bus
10 A14 --> "
11 A13 --> "
12 A12 --> "
13 A11 --> "
14 A10 --> "
15 A9 --> "
16 A8 --> "
17 A7 --> "
18 A6 --> "
19 A5 --> "
20 A4 --> "
21 A3 --> "
22 A2 --> "
23 A1 --> "
24 A0 --> "
25 /RFSH --> RAM expansion refresh
26 /EXCSR <-- Video-CPU write select
27 /M1 --> Z80 M1
28 /EXCSW <-- CPU-Video write select
29 /WR --> Z80 WR
30 /MREQ --> Z80 MREQ
31 /IORQ --> Z80 IORQ
32 /RD --> Z80 RD
33 D0 Buffered Data Bus
34 D1 "
35 D2 "
36 D3 "
37 D4 "
38 D5 "
39 D6 "
40 D7 "
41 CSOUND <-- Audio input signal
42 /INT <-- Z80 INT
43 /RAMDIS <-- Disable user RAM
44 /ROMDIS <-- Disable basic ROM
45 /BK32 --> Enable bank 32 Memory (8000-ffff)
46 /BK31 --> Enable bank 31 Memory (0000-7FFF)
47 /BK22 --> Enable bank 22 Memory (8000-FFFF)
48 /BK21 --> Enable bank 21 Memory (0000-7FFF)
49 GND - System Ground
50 GND - System Ground
 
0

MSX Expansion

  • 26-11-2009, 13:32
  • Просмотров: 2009
MSX Expansion
49 47 45   5 3 1
+---------//-----+
| H H H  //H H H |
| ======//====== |
| H H H//  H H H |
+-----//---------+
 50 48 46  6 4 2

UNKNOWN (at the Computer)

50 PIN ?? at the Computer.

Pin Name Dir Description
1 /CS1 --> Memory Read in addresses 4000-7FFF
2 /CS2 --> Memory Read in addresses 8000-BFFF
3 /CS12 --> Memory Read in addresses 4000-BFFF
4 /SLTSL --> Low when Slot 2 (cartridge slot) is selected
5 - Not connected.
6 /RFSH --> Refresh signal from CPU
7 /WAIT <-- OC, Tells CPU to wait. Refresh signal is not maintained
8 /INT <-- OC, Requests a interrupt to CPU (call to addr 38h)
9 /M1 --> CPU fetches first part of instruction from memory.
10 /BUSDIR <-- NC, was used to control the data direction.
11 /IORQ --> I/O request signal. (Address=Port)
12 /MREQ --> Memory request signal. (Address=Address)
13 /WR --> Write signal (strobe)
14 /RD --> Read signal (strobe)
15 /RESET <-- Reset
16 - Not connected.
17 A0 --> Address 0
18 A1 --> Address 1
19 A2 --> Address 2
20 A3 --> Address 3
21 A4 --> Address 4
22 A5 --> Address 5
23 A6 --> Address 6
24 A7 --> Address 7
25 A8 --> Address 8
26 A9 --> Address 9
27 A10 --> Address 10
28 A11 --> Address 11
29 A12 --> Address 12
30 A13 --> Address 13
31 A14 --> Address 14
32 A15 --> Address 15
33 D0 <-> Data 0
34 D1 <-> Data 1
35 D2 <-> Data 2
36 D3 <-> Data 3
37 D4 <-> Data 4
38 D5 <-> Data 5
39 D6 <-> Data 6
40 D7 <-> Data 7
41 GND --- Ground
42 CLOCK --> CPU clock, 3.579 MHz
43 GND --- Ground
44 SW1 - NC, Insert/remove detection for protection
45 +5V --> +5 VDC (300mA max /slot)
46 SW2 - NC, Insert/remove detection for protection
47 +5V --> +5 VDC (300mA max /slot)
48 +12V --> +12 VDC (50mA max /slot)
49 SOUNDIN <-- Sound input (-5dBm)
50 -12V --> -12 VDC (50mA max /slot)

Note: Direction is Computer relative Peripheral.

 
CDTV Expansion Slot
 2  4  6  8 10 12 14 16 18 20 22 24 26 28 30
-- -- -- -- -- -- -- -- -- -- -- -- -- -- --
-- -- -- -- -- -- -- -- -- -- -- -- -- -- --
 1  3  5  7  9 11 13 15 17 19 21 24 25 27 29

30 PIN ??? CONNECTOR (at the computer)

30 PIN ??? CONNECTOR at the computer.

Pin Name Description
1 GND Ground
2 GND Ground
3 VCC +5 VDC
4 VCC +5 VDC
5 SD1 Data Bus 1
6 SD0 Data Bus 0
7 SD3 Data Bus 3
8 SD2 Data Bus 2
9 SD5 Data Bus 5
10 SD4 Data Bus 4
11 SD7 Data Bus 7
12 SD6 Data Bus 6
13 /SDREQ DMA Request
14 /INTX Interrupt Request
15 /CSS Chip Select
16 /SDACK DMA Acknowledge
17 /IOR I/O Read
18 /IOW I/O Write
19 A8 Address Bus 8
20 7M 7.16 MHz System Clock
21 A6 Address Bus 6
22 A7 Address Bus 7
23 A4 Address Bus 4
24 A5 Address Bus 5
25 A2 Address Bus 2
26 A3 Address Bus 3
27 /IFRST +5 VDC
28 A1 Address Bus 1
29 GND Ground
30 GND Ground
 
C16/+4 Expansion Bus

Available on Commodore C16, C116 and +4 computers.

UNKNOWN (at the Computer)

50 PIN FEMALE EDGE (2 mm pitch) at the Computer.

Pin Name Description
1 GND Ground
2 +5V +5 VDC
3 +5V +5 VDC
4 /IRQ Interrupt
5 Read/Write (1=Read, 0=Write)
6 C1HIGH External Cartridge Chip Selects C1 High
7 C2LOW External Cartridge Chip Selects C2 Low (reserved)
8 C2HIGH External Cartridge Chip Selects C2 High (reserved)
9 /CS1 Chip Select Line 1
10 /CS0 Chip Select Line 0
11 /CAS Column Address Strobe
12 MUX DRAM address multiplex control signal
13 BA Bus Available (Low=DMA)
14 D7 Data 7
15 D6 Data 6
16 D5 Data 5
17 D4 Data 4
18 D3 Data 3
19 D2 Data 2
20 D1 Data 1
21 D0 Data 0
22 AEC Address Enable Code
23 EAI External Audio In
24 PHI 2 Artificial Phi 2 signal
25 GND Ground
A GND Ground
B C1LOW External Cartridge Chip Selects C1 Low
C /RESET Reset
D /RAS Row Address Strobe
E PHI 0 Artificial Phi 0 Signal
F A15 Address 15
H A14 Address 14
J A13 Address 13
K A12 Address 12
L A11 Address 11
M A10 Address 10
N A9 Address 9
P A8 Address 8
R A7 Address 7
S A6 Address 6
T A5 Address 5
U A4 Address 4
V A3 Address 3
W A2 Address 2
X A1 Address 1
Y A0 Address 0
Z Not connected
AA Not connected
BB Not connected
CC GND Ground

PHI 2: Address valid on the rising edge, data valid on the falling edge

 
C64 Cartridge Expansion

UNKNOWN (at the computer)

44 PIN FEMALE EDGE at the computer.


Pin Name Description
1 GND Ground
2 +5V +5 Volts DC
3 +5V +5 Volts DC
4 /IRQ Interrupt Request
5 /CR/W  
6 DOTCLK Dot Clock
7 I/O 1  
8 /GAME Game
9 /EXROM  
10 I/O 2  
11 /ROML ROM Low
12 BA  
13 /DMA  
14 CD7 Cartridge Data 7
15 CD6 Cartridge Data 7
16 CD5 Cartridge Data 7
17 CD4 Cartridge Data 7
18 CD3 Cartridge Data 7
19 CD2 Cartridge Data 7
20 CD1 Cartridge Data 7
21 CD0 Cartridge Data 7
22 GND Ground
     
A GND Ground
B /ROMH ROM High
C /RESET Reset
D /NMI Non Maskable Interrupt
E S02  
F CA15 Cartridge Address 15
H CA14 Cartridge Address 14
J CA13 Cartridge Address 13
K CA12 Cartridge Address 12
L CA11 Cartridge Address 11
M CA10 Cartridge Address 10
N CA9 Cartridge Address 9
P CA8 Cartridge Address 8
R CA7 Cartridge Address 7
S CA6 Cartridge Address 6
T CA5 Cartridge Address 5
U CA4 Cartridge Address 4
V CA3 Cartridge Address 3
W CA2 Cartridge Address 2
X CA1 Cartridge Address 1
Y CA0 Cartridge Address 0
Z GND Ground
 
Atari 7800 Expansion
 Gnd   +5v  CVideo MLum0 Mlum3 Blank OscDis ExtMen Gnd
--1-- --2--  --3-- --4-- --5-- --6-- --7-- ---8-- --9--

-18-- -17--  -16-- -15-- -14-- -13-- -12-- --11-- -10--
 Gnd  Audio   Rdy   MCol MLum2 MLum1 Msync  Clk2  ExtOsc

UNKNOWN (at the Atari)

UNKNOWN CONNECTOR at the Atari.

Pin Name Description
1 GND Ground
2 +5V +5 VDC
3 CVIDEO Input to RF modulator (Video+Audio)
4 MLUM0 Maria Luminance Bit 0
5 MLUM3 Maria Luminance Bit 3
6 BLANK Blanking output
7 OSCDIS Disable 14.31818 MHz Master Clock
8 EXTMEN External Maria Enable Input
9 GND Ground
10 EXTOSC External clock to replace Master Clock
11 CLK2 Phase 2 Clock from the 6502
12 MSYNC Maria Composite Sync
13 MLUM1 Maria Luminance Bit 1
14 MLUM2 Maria Luminance Bit 2
15 MCOL Maria Color Phase Angle
16 RDY Input to the 6502
17 AUDIO Audio
18 GND Ground
 
C128 Expansion Bus

Available at the Commodore 128.

UNKNOWN (at the computer)

44 PIN FEMALE EDGE at the computer.

Pin Name Description
1 GND System Ground
2 +5V System Vcc
3 +5V System Vcc
4 /IRQ Interrupt request
5 System Read/Write Signal
6 DClock 8.18MHz Video Dot Clock
7 I/O1 I/O Chip select $de00-deff
8 /GAME Sensed for memory map configuration
9 /EXROM Sensed for memory map configuration
10 I/O2 I/O Chip select $df00-dfff
11 /ROML External ROM select $8000-Bfff
12 BA Bus available output
13 /DMA Direct memory access input
14 D7 Data bit 7
15 D6 Data bit 6
16 D5 Data bit 5
17 D4 Data bit 4
18 D3 Data bit 3
19 D2 Data bit 2
20 D1 Data bit 1
21 D0 Data bit 0
22 GND System Ground
     
A GND System Ground
B /ROMH External ROM Select $c000-ffff
C /RESET System Reset Signal
D /NMI Non-Maskable Interrupt
E 1MHz System 1MHz clock
F TA15 Translated address bit 15
H TA14 Translated address bit 14
J TA13 Translated address bit 13
K TA12 Translated address bit 12
L TA11 Translated address bit 11
M TA10 Translated address bit 10
N TA9 Translated address bit 9
P TA8 Translated address bit 8
R SA7 Shared address bit 7
S SA6 Shared address bit 6
T SA5 Shared address bit 5
U SA4 Shared address bit 4
V SA3 Shared address bit 3
W SA2 Shared address bit 2
X SA1 Shared address bit 1
Y SA0 Shared address bit 0
Z GND System Ground
 
Atari 5200 Expansion

UNKNOWN (at the Atari)

UNKNOWN CONNECTOR at the Atari.

Pin Name
1 +5 VDC
2 Audio Out (2 port)
3 Ground
4 R/W Early
5 Enable E0-EF
6 D6
7 D4
8 D2
9 D0
10 IRQ
11 Ground
12 Serial Data In
13 Serial In Clock
14 Serial Out Clock
15 Serial Data Out
16 Audio In
17 A14
18 System Clock 01
19 A11
20 A7
21 A6
22 A5
23 A4
24 A3
25 A2
26 A1
27 A0
28 Ground
29 D1
30 D3
31 D5
32 D7
33 Not connected
34 Ground
35 Not connected
36 +5 VDC
 
Apple Macintosh Portable ROM Expansion

50 PIN UNKNOWN CONNECTOR

Pin Name Description
1 +5V +5 VDC
2 A1 Address bit 1
3 A2 Address bit 2
4 A3 Address bit 3
5 A4 Address bit 4
6 A5 Address bit 5
7 A6 Address bit 6
8 A7 Address bit 7
9 A8 Address bit 8
10 A9 Address bit 9
11 A10 Address bit 10
12 A11 Address bit 11
13 A12 Address bit 12
14 A13 Address bit 13
15 A14 Address bit 14
16 A15 Address bit 15
17 A16 Address bit 16
18 A17 Address bit 17
19 A18 Address bit 18
20 A19 Address bit 19
21 A20 Address bit 20
22 A21 Address bit 21
23 A22 Address bit 22
24 A23 Address bit 23
25 GND Ground
26 GND Ground
27 /DTACK Data Transfer Acknowledge
28 /AS Address Strobe
29 /ROM_CS ROM Chip Select
30 16M 16 MHz Clock
31 /EXT_DTACK External Data Transfer Acknowledge
32 /DELAY_CS
33 D0 Data bit 0
34 D1 Data bit 1
35 D2 Data bit 2
36 D3 Data bit 3
37 D4 Data bit 4
38 D5 Data bit 5
39 D6 Data bit 6
40 D7 Data bit 7
41 D8 Data bit 8
42 D9 Data bit 9
43 D10 Data bit 10
44 D11 Data bit 11
45 D12 Data bit 12
46 D13 Data bit 13
47 D14 Data bit 14
48 D15 Data bit 15
49 +5V +5 VDC
50 +5V +5 VDC

D0-D15

Unbuffered data bus, bits 0 through 15

A1-A23

Unbuffered 68HC000 address bus, bits 1 through 23

16M

16 MHz system clock

/EXT.DTACK

External data transfer acknowledge that disables main system /DTACK.

/AS

68HC000 Address strobe

/DTACK

Data transfer acknowledge, /DTACK input to 68HC000.

/DELAY_CS

This signal is generated by the addressing PAL and is used to put the ROM board into the idle mode by inserting multiple wait states.

/ROM_CS

Permanent ROM chip select signal. Selects in range $90 0000 through $9F FFFF.

 
 

 
 
 
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