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Video Expansion (Amiga)

36+54 PIN EDGE CONNECTOR (At the computer)

36+54 PIN EDGE CONNECTOR at the computer.

Pin Name Dir Description
1 RGB16 --> Red Bit 0
2 RGB17 --> Red Bit 1
3 LINELF --> Audio Line Out Left
4 LINERT --> Audio Line Out Right
5 C28D --> Pixel-Synchronous Clock
6 +5V - +5 Volts DC (1 A)
7 ARED --> Analog Red
8 +5V - +5 Volts DC (1 A)
9 GND - Digital Ground
10 +12V - +12 Volts DC (40 mA)
11 AGREEN --> Analog Green
12 GND - Digital Ground
13 GND - Digital Ground
14 /CSYNC --> Composite Sync
15 ABLUE --> Analog Blue
16 /XCLKEN <-- Genlock Clock Enable
17 GND - Digital Ground
18 BURST --> Burst Gate
19 /C4 --> 3.55/3.58 MHz Clock
20 GND - Digital Ground
21 GND - Digital Ground
22 /HSYNC --> Horizontal Sync (47 Ohm)
23 RGB4 --> Blue Bit 4
24 GND - Digital Ground
25 RGB7 --> Blue Bit 7
26 /VSYNC --> Vertical Sync (47 Ohm)
27 RGB15 --> Green Bit 7
28 BLANK --> Video Blank
29 RGB23 --> Red 7
30 /PIXELSW --> Genlock Overlay (47 Ohm)
31 -5V - -5 Volts DC
32 GND - Digital Ground
33 /XCLK <-- Genlock Clock
34 /C1 --> C1 Clock
35 +5V - +5 Volts DC (1 A)
36 PSTROBE --> Printer Port Handshake
       
1 GND - Digital Ground
2 RGB20 --> Red Bit 4
3 RGB21 --> Red Bit 5
4 RGB22 --> Red Bit 6
5 GND - Digital Ground
6 RGB12 --> Green Bit 4
7 RGB13 --> Green Bit 5
8 RGB14 --> Green Bit 6
9 GND - Digital Ground
10 RGB5 --> Blue Bit 5
11 RGB6 --> Blue Bit 6
12 GND - Ground
13 SOG --> Sync-On-Green Indicator
14 TBASE --> 50/60 Hz Software Clock Timebase
15 CDAC --> 7.09/7.16 MHz Clock
16 PPOUT <-> Printer Port Paper Out
17 /C3 --> 3.55/3.58 MHz Clock
18 PBUSY <-> Printer Port Busy
19 /LPEN <-- Light Pen Input
20 /PACK <-> Printer Port Acknowledge Handshake
21 PSEL --> Printer Port Select
22 GND - Digital Ground
23 PPD0 <-> Printer Port Data Bit 0
24 PPD1 <-> Printer Port Data Bit 1
25 PPD2 <-> Printer Port Data Bit 2
26 PPD3 <-> Printer Port Data Bit 3
27 PPD4 <-> Printer Port Data Bit 4
28 PPD5 <-> Printer Port Data Bit 5
29 PPD6 <-> Printer Port Data Bit 6
30 PPD7 <-> Printer Port Data Bit 7
31 /LED --> LED (Audio filter bypass) Setting
32 GND - Digital Ground
33 RAWLF --> Raw (Unfiltered) Audio Left
34 AGND - Audio Ground
35 RAWRT --> Raw (Unfiltered) Audio Right
36 AGND - Audio Ground
37 n/c - Reserved for future expansion
38 n/c - Reserved for future expansion
39 GND - Digital Ground
40 GND - Digital Ground
41 n/c - Reserved for future expansion
42 n/c - Reserved for future expansion
43 GND - Digital Ground
44 GND - Digital Ground
45 RGB18 --> Red Bit 2
46 RGB19 --> Red Bit 3
47 RGB8 --> Green Bit 0
48 RGB9 --> Green Bit 1
49 RGB10 --> Green Bit 2
50 RGB11 --> Green Bit 3
51 RGB0 --> Blue Bit 0
52 RGB1 --> Blue Bit 1
53 RGB2 --> Blue Bit 2
54 RGB3 --> Blue Bit 3
Note: Direction is Motherboard relative Card.
Note: Do not mix analog & digital grounds.
 
 
0

ISA

  • 23-02-2009, 23:52
  • Просмотров: 3010
 

ISA

ISA=Industry Standard Architecture

62+36 PIN EDGE CONNECTOR MALE (At the card)
62+36 PIN EDGE CONNECTOR FEMALE (At the computer)

62+36 PIN EDGE CONNECTOR MALE at the card.
62+36 PIN EDGE CONNECTOR FEMALE at the computer.

Pin Name Dir Description
A1 /I/O CH CK <-- I/O channel check; active low=parity error
A2 D7 <-> Data bit 7
A3 D6 <-> Data bit 6
A4 D5 <-> Data bit 5
A5 D4 <-> Data bit 4
A6 D3 <-> Data bit 3
A7 D2 <-> Data bit 2
A8 D1 <-> Data bit 1
A9 D0 <-> Data bit 0
A10 I/O CH RDY <-- I/O Channel ready, pulled low to lengthen memory cycles
A11 AEN --> Address enable; active high when DMA controls bus
A12 A19 --> Address bit 19
A13 A18 --> Address bit 18
A14 A17 --> Address bit 17
A15 A16 --> Address bit 16
A16 A15 --> Address bit 15
A17 A14 --> Address bit 14
A18 A13 --> Address bit 13
A19 A12 --> Address bit 12
A20 A11 --> Address bit 11
A21 A10 --> Address bit 10
A22 A9 --> Address bit 9
A23 A8 --> Address bit 8
A24 A7 --> Address bit 7
A25 A6 --> Address bit 6
A26 A5 --> Address bit 5
A27 A4 --> Address bit 4
A28 A3 --> Address bit 3
A29 A2 --> Address bit 2
A30 A1 --> Address bit 1
A31 A0 --> Address bit 0
B1 GND Ground
B2 RESET --> Active high to reset or initialize system logic
B3 +5V +5 VDC
B4 IRQ2 <-- Interrupt Request 2
B5 -5VDC -5 VDC
B6 DRQ2 <-- DMA Request 2
B7 -12VDC -12 VDC
B8 /NOWS <-- No WaitState
B9 +12VDC +12 VDC
B10 GND Ground
B11 /SMEMW --> System Memory Write
B12 /SMEMR --> System Memory Read
B13 /IOW --> I/O Write
B14 /IOR --> I/O Read
B15 /DACK3 --> DMA Acknowledge 3
B16 DRQ3 <-- DMA Request 3
B17 /DACK1 --> DMA Acknowledge 1
B18 DRQ1 <-- DMA Request 1
B19 /REFRESH <-> Refresh
B20 CLOCK --> System Clock (67 ns, 8-8.33 MHz, 50% duty cycle)
B21 IRQ7 <-- Interrupt Request 7
B22 IRQ6 <-- Interrupt Request 6
B23 IRQ5 <-- Interrupt Request 5
B24 IRQ4 <-- Interrupt Request 4
B25 IRQ3 <-- Interrupt Request 3
B26 /DACK2 --> DMA Acknowledge 2
B27 T/C --> Terminal count; pulses high when DMA term. count reached
B28 ALE --> Address Latch Enable
B29 +5V +5 VDC
B30 OSC --> High-speed Clock (70 ns, 1431818 MHz, 50% duty cycle)
B31 GND Ground
C1 SBHE <-> System bus high enable (data availble on SD8-15)
C2 LA23 <-> Address bit 23
C3 LA22 <-> Address bit 22
C4 LA21 <-> Address bit 21
C5 LA20 <-> Address bit 20
C6 LA18 <-> Address bit 19
C7 LA17 <-> Address bit 18
C8 LA16 <-> Address bit 17
C9 /MEMR <-> Memory Read (Active on all memory read cycles)
C10 /MEMW <-> Memory Write (Active on all memory write cycles)
C11 SD08 <-> Data bit 8
C12 SD09 <-> Data bit 9
C13 SD10 <-> Data bit 10
C14 SD11 <-> Data bit 11
C15 SD12 <-> Data bit 12
C16 SD13 <-> Data bit 13
C17 SD14 <-> Data bit 14
C18 SD15 <-> Data bit 15
D1 /MEMCS16 <-- Memory 16-bit chip select (1 wait, 16-bit memory cycle)
D2 /IOCS16 <-- I/O 16-bit chip select (1 wait, 16-bit I/O cycle)
D3 IRQ10 <-- Interrupt Request 10
D4 IRQ11 <-- Interrupt Request 11
D5 IRQ12 <-- Interrupt Request 12
D6 IRQ15 <-- Interrupt Request 15
D7 IRQ14 <-- Interrupt Request 14
D8 /DACK0 --> DMA Acknowledge 0
D9 DRQ0 <-- DMA Request 0
D10 /DACK5 --> DMA Acknowledge 5
D11 DRQ5 <-- DMA Request 5
D12 /DACK6 --> DMA Acknowledge 6
D13 DRQ6 <-- DMA Request 6
D14 /DACK7 --> DMA Acknowledge 7
D15 DRQ7 <-- DMA Request 7
D16 +5 V
D17 /MASTER <-- Used with DRQ to gain control of system
D18 GND Ground
Note: Direction is Motherboard relative ISA-Cards.
Note: B8 was /CARD SLCDTD on the XT. Card selected, activated by cards in XT's slot J8
 
 
 
 
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